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N02L83W2A
Absolute Maximum Ratings 1
Item
Voltage on any pin relative to V SS
Voltage on V CC Supply Relative to V SS
Power Dissipation
Storage Temperature
Operating Temperature
Soldering Temperature and Time
Symbol
V IN,OUT
V CC
P D
T STG
T A
T SOLDER
Rating
–0.3 to V CC +0.3
–0.3 to 4.5
500
–40 to 125
-40 to +85
260 o C, 10sec
Unit
V
V
mW
o C
o C
o C
1. Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operating section of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Operating Characteristics (Over Specified Temperature Range)
Item
Supply Voltage
Data Retention Voltage
Input High Voltage
Input Low Voltage
Symbol
V CC
V DR
V IH
V IL
Test Conditions
Chip Disabled 3
Min.
2.3
1.8
1.8
–0.3
Typ 1
3.0
Max
3.6
V CC +0.3
0.6
Unit
V
V
V
V
Output High Voltage
Output Low Voltage
Input Leakage Current
Output Leakage Current
V OH
V OL
I LI
I LO
I OH = 0.2mA
I OL = -0.2mA
V IN = 0 to V CC
OE = V IH or Chip Disabled
V CC –0.2
0.2
0.5
0.5
V
V
μ A
μ A
Read/Write Operating Supply Current
@ 1 μ s Cycle Time 2
Read/Write Operating Supply Current
@ 70 ns Cycle Time 2
I CC1
I CC2
V CC =3.6 V, V IN =V IH or V IL
Chip Enabled, I OUT = 0
V CC =3.6 V, V IN =V IH or V IL
Chip Enabled, I OUT = 0
2.0
12.0
4.0
16.0
mA
mA
Page Mode Operating Supply Current
@ 70 ns Cycle Time 2 (Refer to Power
Savings with Page Mode Operation
I CC3
V CC =3.6 V, V IN =V IH or V IL
Chip Enabled, I OUT = 0
4.0
mA
diagram)
Read/Write Quiescent Operating Sup-
ply Current 3
I CC4
V CC =3.6 V, V IN =V IH or V IL
Chip Enabled, I OUT = 0,
f=0
3.0
mA
V IN = V CC or 0V
Maximum Standby
Current 3
I SB1
Chip Disabled
t A = 85 o C, V CC = 3.6 V
2.0
20.0
μ A
Maximum Data Retention Current 3
I DR
V CC = 1.8V, V IN = V CC or 0
Chip Disabled, t A = 85 o C
10.0
μ A
1. Typical values are measured at Vcc=Vcc Typ., T A =25°C and not 100% tested.
2. This parameter is specified with the outputs disabled to avoid external loading effects. The user must add current required to drive
output capacitance expected in the actual system.
3. This device assumes a standby mode if the chip is disabled (CE1 high or CE2 low). In order to achieve low standby current all
inputs must be within 0.2 volts of either VCC or VSS.
Rev. 8 | Page 3 of 10 | www.onsemi.com
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